The Mil & Aero Blog
Tuesday, August 11, 2009
  End of Altivec PowerPC digital signal processing chip spells headache for Serial RapidIO designers
Posted by John McHale

The next-generation PowerPC family from Freescale, the QorIQ, has a new CPU core -- the e500 -- which does not support the Altivec engine that commercial off the shelf (COTS) single board computer suppliers rely on for many of their military digital signal processing (DSP) systems. The Altivec is not being end-of-lifed, it is just not being offered in Freescale's next generation chip.

Designers that produce Serial RapidIO switched fabric interconnect products are especially concerned as the main alternative -- Intel's family of multicore devices with SSE -- do not have Serial RapidIO (SRIO) end points because Intel does not see the demand form the majority of their customer base, Michael Stern of GE Fanuc Intelligent Platforms told me. I was interviewing Stern for a Technology Focus feature on I/O that will appear in our September issue of Military & Aerospace Electronics magazine.

Stern says "whereas Freescale and Texas Instruments and other chip vendors have seen demand for Serial RapidIO enabled end points from a significant segment of their market -- defense and telecommunications -- Intel has not so far seen the need to support SRIO on chip."

This is not surprising as SRIO is most popular among military signal processing designers. During a panel discussion at our Military & Aerospace Electronics Forum conference last year Ron Parker of Intel said that the defense industry represents less than one percent of Intel's business.

Stern and others I talked to for the story agreed that going forward COTS embedded single-board computer suppliers will need to support multiple serial interconnect fabrics in addition to SRIO such as Gigabit Ethernet, 10 Gigabit Ethernet, and PCI Express -- all of which Intel does support.

Some companies are working around this issue with a PCI Express to SRIO bridge/switch device but these devices are not yet available and those designing them are tight-lipped about what they are tinkering with.

Another solution Stern says is to offer FPGA based solutions that deploy custom IP to get from PCI Express to SRIO, however FPGA based solutions present a challenge because they "are costly in terms of power budget and card real estate."

In the mean time Freescale's QorIQ will be relevant to defense applications where the Altivec unit is not used, such as image processing, but not in intensive DSP applications, Stern says.

I'd love to hear what all of you think about this situation, so please feel free to comment.
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